SDRAM W9812G2KB-6I, 128Mbit, 166MHZ, Montaje superficial, TFBGA, 90 pines

3.3V ± 0.3V power supply
1,048,576 words x 4 banks x 32 bits organization
Self Refresh Current: Standard and Low Power
CAS Latency: 2 & 3
Burst Length: 1, 2, 4, 8 and full page
Sequential and Interleave Burst
Byte data controlled by DQM0-3
Auto-precharge and controlled precharge
Burst read, single write operation
4K refresh cycles/64mS
Interface: LVTTL
Packaged in TFBGA 90 Ball (8 x13 mm2), using Lead free materials.
Dual-Die-Package (DDP), two pieces of 64M bits chip sealed in one package

The W9812G2KB is a 128M SDRAM and speed involving -6/-6I.

3.3V± 0.3V power supply 1,048,576 Words x 4 banks x 32 bits organization
Self Refresh Mode
CAS Latency: 2 and 3
Burst Length: 1, 2, 4, 8 and full page
Sequential and Interleave Burst
Byte Data Controlled by DQM0-3
Auto-precharge and controlled precharge
Burst read, single write operation
4K Refresh Cycles/64mS
Interface: LVTTL
Dual-Die-Package (DDP), two pieces of 64M bits chip sealed in one
Package